The present invention relates to an inexpensive silicon wafer of 450 mm or more prepared using a unidirectionally solidified polycrystalline silicon ingot.
The shape of a monocrystalline silicon wafer that is used in an LSI process has been increasing its diameter over time and is predicted to have a diameter of 450 mm or more in the future. In the present conditions, however, the production of a large-sized monocrystalline wafer having a diameter of 450 mm or more still has many problems in the aspects of mass production (problems such as crystal weight, pulling time, and cooling method) and of quality (problems such as crystal defect, machining defect, flatness, and surface cleanliness) and also has a difficult problem, in particular, in the aspect of cost (very expensive). Consequently, the number of wafers that can be supplied is insufficient, and the preparation for transition to the large-sized wafer is not completed at the present time.
Incidentally, not all silicon wafers are used in production of LSI chips, and the silicon wafer is also used as a dummy wafer (filler wafer), which is not necessarily a monocrystal, for production control and stabilization. In particular, under the conditions that the supply of monocrystalline wafers having a diameter of 450 mm or more is uncertain, dummy wafers that will be developed as large-sized monocrystalline wafers having a diameter of 450 mm or more are indispensable for production of various new-type semiconductors, trial manufacturing of a test apparatus, and test operation thereof. However, there are many differences between large-diameter monocrystalline silicon wafers and large-diameter polycrystalline silicon dummy wafers in surface roughness, surface cleanliness, and mechanical properties. Accordingly, expensive monocrystalline wafers must be used as dummy wafers in many cases, which is a factor causing a delay in LSI process development and an increase in cost.
Accordingly, it is an object of the present invention to provide an inexpensive polycrystalline silicon wafer that can be used as a dummy wafer having a diameter of 450 mm or more and having surface texture and mechanical properties similar to those of monocrystalline silicon wafers.
In the present invention, monocrystalline ingots produced by a Czochralski method (Cz method) or a floating zone method (FZ method) are not used, but silicon ingots produced by unidirectional solidification after heat melting are used.
Polycrystalline silicon ingots produced by a melting method have been used in wafers for solar cells in the past, but have not been used in silicon wafers of 450 mm or more for semiconductors at all. The reasons therefor are believed as follows.
In melting of an ingot for solar cells, blocks of 680 mm square or more are produced. However, the common size (cell size) of a silicon wafer for solar cells is 156 mm square, and a large number of such silicon wafers are bonded to constitute a large solar cell panel.
The reasons for each silicon wafer having a small cell size of 156 mm are, in addition to a technical difficulty of processing the silicon wafer with a large size to solar cells, a tendency of being broken if the wafer thickness is not increased with an increase in size. Also, a reduction in the thickness of the wafer is required from the viewpoint of reducing the cost, and a restriction in design of solar cell panel size in the case of a too large cell size, resulting in a reduction in usability.
The thickness of a cell wafer is usually 200 μm and has been reduced to 100 μm recently. Furthermore, a Si wafer for solar cells usually has a surface roughness Ra of 0.2 to 2 μm, and recently, in order to suppress the light reflection and to increase the photoelectric conversion efficiency, the wafer surface tends to be intentionally roughened.
In light of the crystal grain sizes of wafers, the conventional sintered silicon wafers for LSI are, as described in Patent Document 1, sintered compacts having a crystal grain size of 100 μm or less or, as described in Patent Document 2, sintered compacts having an average grain size ranging from 1 to 10 μm. Their sizes are incomparably smaller than the crystal grain size of the polycrystalline silicon according to the present invention.
In these sintered silicon dummy wafers, the strength of the wafer can be increased by controlling the transverse rupture strength, the tensile strength, and the Vickers hardness. However, there is a limitation of the wafer gravitational sag to be brought close to that of the monocrystalline silicon wafer, which is a cause of strictly limiting the use of a wafer having a diameter of 450 mm or more as a dummy wafer.
Furthermore, in light of cleanliness of wafer surface, the purity inside the raw material affecting the conversion efficiency is required to be 7 N or more in a polycrystalline silicon wafer for solar cells, but the wafer surface has been allowed to have a low purity, as long as light is not scattered by contamination. In contrast, in the sintered silicon wafer for LSI produced by sintering, though the surface is strictly washed for introducing the wafer to a semiconductor process, impurities incorporated during the production of raw material powder remain inside the material, and there is a limitation in improvement of the surface cleanliness.
Regarding the crystal orientation of polycrystalline silicon in the conventional technology, (111), (110), and (100) are the orientation of the principal planes (Patent Documents 3 and 4). The crystal grain size of an ordinary molten Si ingot is large such as several to a hundred millimeters. Consequently, there still remains a problem that macro-unevenness occurs due to a difference in polish rate caused by orientations of the crystal grains.
In addition, in the conventional technology, polycrystalline silicon used as a dummy wafer is expected to exhibit substantially the same behavior as that of monocrystalline silicon, and it is very important that the sag value does not to deviate from that of a monocrystalline silicon wafer. However, the polycrystalline silicon in Patent Documents 3 and 4 has problems also in this point. This is a cause that the polycrystalline silicon is not used as silicon dummy wafers of 450 mm or more for semiconductors.
Examples of the conventional technology of polycrystalline silicon used as dummy wafers include, as references, Patent Document 3 that proposes an inexpensive polycrystalline silicon dummy wafer having flatness and having excellent mechanical strength and thermal shock resistance by controlling the crystal orientation of polycrystalline silicon, performing CMP polishing using a masking agent, and providing a SiO2 oxide thin film on the main surface of a substrate.
Furthermore, as a technology utilizing unidirectional solidification, Patent Document 4 discloses a technology for unidirectionally growing a Si-based crystal by casting, wherein a crystal piece containing Si is placed on the bottom of a crucible for cast growing, a Si raw material is placed on the crystal piece in the crucible for cast growing, the crucible for cast growing is heated to melt the Si raw material for forming a Si melt in such a manner that a part of the crystal piece remains, and then the Si melt is cooled to be solidified.
Patent Document 1: Japanese Patent Laid-Open No. 2004-289065
Patent Document 2: International Publication No. WO2009/011233
Patent Document 3: Japanese Patent Laid-Open No. 2009-38220
Patent Document 4: International Publication No. WO2005/007938